Nvidia also uses RISC-V CPUs in its GPUs like the Geforce range.
I wonder if, in time, we might see them use these learnings to develop a leading RISC-V processor at some point.
Interesting times especially considering they tried buying out ARM at one point.
If I had to guess, iRISC = internal RISC. They likely rolled their own to avoid having to worry about features that they do not use and avoid having to pay royalties to others.
irisc-hacker 34 days ago [-]
Might be but they have still taken a few different choices that I don't think other ISAs have. For instance they are branching on flags that are not easily accessible, and the return address is not stored in a general purpose register. They have 64bit registers but only 32bits of address space, and I don't think that the upper half of the registers are ever saved to the stack.
adrian_b 34 days ago [-]
From what you say, the handling of the flags and of the return address could be somewhat similar to IBM POWER, i.e. with a dedicated link register and a dedicated flags register.
I doubt that they have any feature that is really different from other popular ISAs.
It is much more likely that they have combined features from multiple well-known RISC ISAs, so you should compare what you see also with other RISC ISAs, not only with MIPS.
Even if nowadays much fewer ISAs have been remained in use than before, and many people are familiar only with these surviving ISAs, there have been so many ISAs in the past that pretty much every possible feature of instruction encoding has already been included in some past ISA.
Like in scripts for new movies, when designing a new ISA it would be extremely difficult to find any encoding feature that had not already been used before.
I wonder if, in time, we might see them use these learnings to develop a leading RISC-V processor at some point. Interesting times especially considering they tried buying out ARM at one point.
https://www.tomshardware.com/pc-components/gpus/nvidia-to-sh...
I doubt that they have any feature that is really different from other popular ISAs.
It is much more likely that they have combined features from multiple well-known RISC ISAs, so you should compare what you see also with other RISC ISAs, not only with MIPS.
Even if nowadays much fewer ISAs have been remained in use than before, and many people are familiar only with these surviving ISAs, there have been so many ISAs in the past that pretty much every possible feature of instruction encoding has already been included in some past ISA.
Like in scripts for new movies, when designing a new ISA it would be extremely difficult to find any encoding feature that had not already been used before.