The long term plan was something not that different from what Cerebras does, but in order to not scare possible investors their first product was a battery backed wafer scale static RAM to replace hard disks. This market looked attractive since disks had been stuck at 20MB for a while. But right when Anamartic got ready to sell hard disks started to grow like crazy, first going to 30MB by moving from MFM to RLL then jumping to 40MB, 80MB, 160MB, 250MB and so on. This caused all of Sinclair's investors to pull out.
geomark 42 days ago [-]
Interesting article. I wonder if in part 2 they will cover the work done at TRW as part of the VHSIC Phase 2 program. They succeeded with a WSI chip called the CPUAX that used some of the same redundancy techniques together with a built in self test and configuration system.
sschmitt 42 days ago [-]
There's also the BrainScaleS neuromorphic system that features wafer scale integration:
https://www.computinghistory.org.uk/det/3043/Anamartic-Wafer...
The long term plan was something not that different from what Cerebras does, but in order to not scare possible investors their first product was a battery backed wafer scale static RAM to replace hard disks. This market looked attractive since disks had been stuck at 20MB for a while. But right when Anamartic got ready to sell hard disks started to grow like crazy, first going to 30MB by moving from MFM to RLL then jumping to 40MB, 80MB, 160MB, 250MB and so on. This caused all of Sinclair's investors to pull out.
https://arxiv.org/abs/2303.12359